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Postings from January 2013
hv@crypt.org wrote: >Do you know how this facility plays out in the presence of hardware branch >prediction? Depends rather on how that influences the translation to uops. Very dependent on the microarchitecture, and I'm a generation or two behind in reading about them. There's some excellent dynamic branch prediction in current hardware, but unless it triggers retranslation the static hints still have a role in putting the right defaults into the uop stream. >but I really can't tell for sure from the online resources I've found. Offline, there are some marvellous tomes about specific CPU architectures. I rather enjoyed "The Complete Pentium 4", concerning the NetBurst architecture, a work so massive that the last fifteen or so chapters couldn't fit into a bindable printing and had to be relegated to the bundled CD. To get a good appreciation of current hardware one should probably read up on Core (Intel), K10 (AMD), and anything newer on which the books have been written yet. -zeframThread Previous | Thread Next