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Re: An overview of the Parrot interpreter

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From:
Nicholas Clark
Date:
September 7, 2001 04:41
Subject:
Re: An overview of the Parrot interpreter
Message ID:
20010907124128.B32147@plum.flirble.org
On Wed, Sep 05, 2001 at 02:33:20PM +0100, Nick Ing-Simmons wrote:

> The common case will be Pentium-III+ or IA64.
> P-III+ are multi-issue machines with lots of registers and re-naming
> (the fact that they do a "run-time compile" to that form from 386 binary ops
> is a pain.) Explicit stack ops are going to give them indigestion.
> The P-III+ model is that most things are "on the C stack" i.e. offsets
> from the few "base" registers. The hardware then "aliases" those offsets 
> into its real registers. I don't think Parrot's register files will give 

It's a shame that one can't do something like re-program the microcode on
a P-III to remove the 386-bytecode-JIT and hence let one access the real
RISC chip underneath. (OK, so then one has to write a new backend for the
compiler to write out machinecode for this "new" CPU, rebuild one's entire
system including the BIOS, and lose hardware x86 binary compatibility)
But the impression you give is that if one could compile to internal PIII
RISC code it might go "good" rather than "mediocre" (or however Dan would
describe it)

Nicholas Clark

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