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Postings from September 2001
Uri Guttman <uri@sysarch.com> writes: > >> You say that, since a virtual register machine is closer to the actual hw > >> that will run the program, it's easier to produce the corresponding > >> machine code and execute that instead. The problem is that that's true > >> only on architectures where the virtual machine matches closely the > >> cpu and I don't see that happenning with the current register starved > >> main archs. > > DS> What, you mean the x86? The whole world doesn't suck. Alpha, > DS> Sparc, MIPS, PA-RISC, and the PPC all have a reasonable number of > DS> registers, and by all accounts the IA64 does as well. Besides, you > DS> can think of a register machine as a stack machine where you can > DS> look back in the stack directly when need be, and you don't need > DS> to mess with the stack pointer nearly as often. > >but it doesn't matter what the underlying hardware machine is. There is a whole plethora of startups doing JVM in Silicon or JVM assists. It would be fun to do a Parrot chip. Chip design for register architecture is much easier than for stack architecture. It is also MUCH easier to do multi-issue code (be that SuperScalar or VLIW) on a register architecture. -- Nick Ing-Simmons http://www.ni-s.u-net.com/Thread Previous | Thread Next